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IRPLCFL4
Circuit Schematic
L1
L2
R1
R2
D1
D2
R3
L1
L2
C3
R7
R8
5
6
IC1a
R11
7
R15
NC
1
D8
IC2
14
VB
Q1
L3
R13
C15
L3a
C1
C2
R6
C7
R10
R12
C20
R16
R17
VCC
VDC
RT
RPH
2
3
4
5
13
12
11
10
HO
VS
LO
CS
C5
R19
C13
Q2
D10
D9
C14
R9
C16
C17
COMMON
R9
CT
6
9
SD
C8
R18
CPH
7
8
COM
R21
C18
R4
C4
2
8
1
D7
D5
L3b
R5
D3
D4
3 4
IC1b
C9
C10
C6
C11
R20
C19
C12
R14
D6
The closed loop regulation dimming ballast section is identical to that used in the reference design
IRFPCFL3. Since we are sensing the lamp arc current with a resistor it is necessary to use voltage
mode preheating so as to avoid detecting the sum of the current in the arc and that in the resonant
output capacitor C16. This has an additional advantage that during preheat and prior to ignition of the
lamp the arc current will always be zero and consequently the feedback circuit will not influence the
oscillator frequency at all until the lamp is running. This means that by setting the value of R17 the
preheat will occur in exactly the same way regardless of which of the live inputs are connected, thus
achieving optimum preheat and ignition under all conditions.
In an integrated CFL design it is not necessary to include R21, R9 and C19 which detect lamp
removal or open lower cathode, pin 9 of IC2 SD can be connected directly to COM. Although it is
recommended to retain the current sense and shut down at the half bridge provided by R19, R20 and
C11, in an integrated CFL these could also be left out and pin 10 CS could be connected directly to
COM.
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